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Freescale Semiconductor /MKV46F15 /PWMA /DTSRCSEL

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Interpret as DTSRCSEL

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15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)SM0SEL45 0 (00)SM0SEL23 0 (00)SM1SEL45 0 (00)SM1SEL23 0 (00)SM2SEL45 0 (00)SM2SEL23 0 (00)SM3SEL45 0 (00)SM3SEL23

SM1SEL23=00, SM2SEL23=00, SM3SEL23=00, SM3SEL45=00, SM0SEL45=00, SM2SEL45=00, SM1SEL45=00, SM0SEL23=00

Description

PWM Source Select Register

Fields

SM0SEL45

Submodule 0 PWM45 Control Select

0 (00): Generated SM0PWM45 signal is used by the deadtime logic.

1 (01): Inverted generated SM0PWM45 signal is used by the deadtime logic.

2 (10): SWCOUT[SM0OUT45] is used by the deadtime logic.

3 (11): PWM0_EXTB signal is used by the deadtime logic.
SM0SEL23

Submodule 0 PWM23 Control Select

0 (00): Generated SM0PWM23 signal is used by the deadtime logic.

1 (01): Inverted generated SM0PWM23 signal is used by the deadtime logic.

2 (10): SWCOUT[SM0OUT23] is used by the deadtime logic.

3 (11): PWM0_EXTA signal is used by the deadtime logic.
SM1SEL45

Submodule 1 PWM45 Control Select

0 (00): Generated SM1PWM45 signal is used by the deadtime logic.

1 (01): Inverted generated SM1PWM45 signal is used by the deadtime logic.

2 (10): SWCOUT[SM1OUT45] is used by the deadtime logic.

3 (11): PWM1_EXTB signal is used by the deadtime logic.
SM1SEL23

Submodule 1 PWM23 Control Select

0 (00): Generated SM1PWM23 signal is used by the deadtime logic.

1 (01): Inverted generated SM1PWM23 signal is used by the deadtime logic.

2 (10): SWCOUT[SM1OUT23] is used by the deadtime logic.

3 (11): PWM1_EXTA signal is used by the deadtime logic.
SM2SEL45

Submodule 2 PWM45 Control Select

0 (00): Generated SM2PWM45 signal is used by the deadtime logic.

1 (01): Inverted generated SM2PWM45 signal is used by the deadtime logic.

2 (10): SWCOUT[SM2OUT45] is used by the deadtime logic.

3 (11): PWM2_EXTB signal is used by the deadtime logic.
SM2SEL23

Submodule 2 PWM23 Control Select

0 (00): Generated SM2PWM23 signal is used by the deadtime logic.

1 (01): Inverted generated SM2PWM23 signal is used by the deadtime logic.

2 (10): SWCOUT[SM2OUT23] is used by the deadtime logic.

3 (11): PWM2_EXTA signal is used by the deadtime logic.
SM3SEL45

Submodule 3 PWM45 Control Select

0 (00): Generated SM3PWM45 signal is used by the deadtime logic.

1 (01): Inverted generated SM3PWM45 signal is used by the deadtime logic.

2 (10): SWCOUT[SM3OUT45] is used by the deadtime logic.

3 (11): PWM3_EXTB signal is used by the deadtime logic.
SM3SEL23

Submodule 3 PWM23 Control Select

0 (00): Generated SM3PWM23 signal is used by the deadtime logic.

1 (01): Inverted generated SM3PWM23 signal is used by the deadtime logic.

2 (10): SWCOUT[SM3OUT23] is used by the deadtime logic.

3 (11): PWM3_EXTA signal is used by the deadtime logic.

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data